H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 151

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
5.5.4
Interrupt operation differs between the EEPMOV.B instruction and the EEPMOV.W instruction.
With the EEPMOV.B instruction, an interrupt request (including NMI) issued during the transfer
is not accepted until the move is completed.
With the EEPMOV.W instruction, if an interrupt request is issued during the transfer, interrupt
exception handling starts at a break in the transfer cycle. The PC value saved on the stack in this
case is the address of the next instruction.
Therefore, if an interrupt is generated during execution of an EEPMOV.W instruction, the
following coding should be used.
5.6
5.6.1
The DTC and DMAC can be activated by an interrupt. In this case, the following options are
available:
For details of interrupt requests that can be used with to activate the DTC or DMAC, see section 8,
Data Transfer Controller (DTC), and section 7, DMA Controller (DMAC).
Interrupt request to CPU
Activation request to DTC
Activation request to DMAC
Selection of a number of the above
L1:
Interrupts during Execution of EEPMOV Instruction
DTC and DMAC Activation by Interrupt
Overview
EEPMOV.W
MOV.W
BNE
R4,R4
L1
Rev. 3.00 Sep 15, 2006 page 117 of 988
Section 5 Interrupt Controller
REJ09B0330-0300

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