H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 554

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 11 Programmable Pulse Generator (PPG)
11.3
11.3.1
PPG pulse output is enabled when the corresponding bits in P1DDR, P2DDR, and NDER are set
to 1. In this state the corresponding PODR contents are output.
When the compare match event specified by PCR occurs, the corresponding NDR bit contents are
transferred to PODR to update the output values.
Figure 11.2 illustrates the PPG output operation and table 11.3 summarizes the PPG operating
conditions.
Table 11.3 PPG Operating Conditions
Sequential output of data of up to 16 bits is possible by writing new output data to NDR before
the next compare match. For details of non-overlapping operation, see section 11.3.4, Non-
Overlapping Pulse Output.
Rev. 3.00 Sep 15, 2006 page 520 of 988
REJ09B0330-0300
NDER
0
1
Pulse output pin
Operation
Overview
0
1
0
1
DDR
Pin Function
Generic input port
Generic output port
Generic input port (but the PODR bit is a read-only bit, and when
compare match occurs, the NDR bit value is transferred to the PODR bit)
PPG pulse output
DDR
Q
Figure 11.2 PPG Output Operation
Normal output/inverted output
Q
NDER
Q
PODR
C
Output trigger signal
D
Q
NDR
D
Internal data bus