H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 563
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H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
(1025 pages)
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11.4
Operation of Pulse Output Pins
Pins PO0 to PO15 are also used for other peripheral functions such as the TPU. When output by
another peripheral function is enabled, the corresponding pins cannot be used for pulse output.
Note, however, that data transfer from NDR bits to PODR bits takes place, regardless of the usage
of the pins.
Pin functions should be changed only under conditions in which the output trigger event will not
occur.
Note on Non-Overlapping Output
During non-overlapping operation, the transfer of NDR bit values to PODR bits takes place as
follows.
Figure 11.10 illustrates the non-overlapping pulse output operation.
Therefore, 0 data can be transferred ahead of 1 data by making compare match B occur before
compare match A. The NDR contents should not be altered during the interval from compare
match B to compare match A (the non-overlap margin).
Pulse
output
pin
NDR bits are always transferred to PODR bits at compare match A.
At compare match B, NDR bits are transferred only if their value is 0. Bits are not transferred
if their value is 1.
Usage Notes
DDR
Figure 11.10 Non-Overlapping Pulse Output
Normal output/inverted output
Q
NDER
Q
PODR
C
Section 11 Programmable Pulse Generator (PPG)
D
Rev. 3.00 Sep 15, 2006 page 529 of 988
Q
NDR
Compare match A
Compare match B
D
REJ09B0330-0300
Internal data bus
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