H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 326

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 8 Data Transfer Controller (DTC)
8.1.2
Figure 8.1 shows a block diagram of the DTC.
The DTC’s register information is stored in the on-chip RAM * . A 32-bit bus connects the DTC to
the on-chip RAM (1 kbyte), enabling 32-bit/1-state reading and writing of the DTC register
information and hence helping to increase processing speed.
Note: * When the DTC is used, the RAME bit in SYSCR must be set to 1.
Rev. 3.00 Sep 15, 2006 page 292 of 988
REJ09B0330-0300
Interrupt
request
Block Diagram
Legend:
MRA, MRB
CRA, CRB
SAR
DAR
DTCERA to DTCERF
DTVECR
Interrupt controller
CPU interrupt
request
Figure 8.1 Block Diagram of DTC
: DTC mode registers A and B
: DTC transfer count registers A and B
: DTC source address register
: DTC destination address register
: DTC enable registers A to F
: DTC vector register
DTC
Internal address bus
Internal data bus
On-chip
RAM