H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 527
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H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
(1025 pages)
- Current page: 527 of 1025
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Status Flag Clearing Timing
After a status flag is read as 1 by the CPU, it is cleared by writing 0 to it. When the DTC or
DMAC is activated, the flag is cleared automatically. Figure 10.46 shows the timing for status flag
clearing by the CPU, and figure 10.47 shows the timing for status flag clearing by the DTC or
DMAC.
Address
Status flag
Interrupt
request
signal
Address
Write signal
Status flag
Interrupt
request
signal
Figure 10.47 Timing for Status Flag Clearing by DTC/DMAC Activation
Figure 10.46 Timing for Status Flag Clearing by CPU
TSR write cycle
Source address
T1
TSR address
DTC/DMAC
T1
read cycle
T2
T2
Section 10 16-Bit Timer Pulse Unit (TPU)
Rev. 3.00 Sep 15, 2006 page 493 of 988
DTC/DMAC
T1
write cycle
Destination
address
T2
REJ09B0330-0300
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