H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 285
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H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
(1025 pages)
- Current page: 285 of 1025
- Download datasheet (6Mb)
For setting details, see section 7.3.4, DMA Controller Register (DMACR).
Figure 7.12 shows an example of the setting procedure for normal mode.
Set transfer source and
Set number of transfers
Normal mode setting
transfer destination
Read DMABCRL
Set DMABCRH
Set DMABCRL
Normal mode
Set DMACR
addresses
Figure 7.12 Example of Normal Mode Setting Procedure
[1]
[2]
[3]
[4]
[5]
[6]
[1] Set each bit in DMABCRH.
[2] Set the transfer source address in MARA, and
[3] Set the number of transfers in ETCRA.
[4] Set each bit in DMACRA and DMACRB.
[5] Read DTE = 0 and DTME = 0 in DMABCRL.
[6] Set each bit in DMABCRL.
• Set the FAE bit to 1 to select full address
• Specify enabling or disabling of internal
the transfer destination address in MARB.
• Set the transfer data size with the DTSZ bit.
• Specify whether MARA is to be incremented,
• Clear the BLKE bit to 0 to select normal
• Specify whether MARB is to be incremented,
• Select the activation source with bits DTF3 to
• Specify enabling or disabling of transfer end
• Set both the DTME bit and the DTE bit to 1 to
mode.
interrupt clearing with the DTA bit.
decremented, or fixed, with the SAID and
SAIDE bits.
mode.
decremented, or fixed, with the DAID and
DAIDE bits.
DTF0.
interrupts with the DTIE bit.
enable transfer.
Rev. 3.00 Sep 15, 2006 page 251 of 988
Section 7 DMA Controller (DMAC)
REJ09B0330-0300
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