H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 301

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Full Address Mode (Block Transfer Mode)
Figure 7.22 shows a transfer example in which TEND output is enabled and word-size full address
mode transfer (block transfer mode) is performed from internal 16-bit, 1-state access space to
external 16-bit, 2-state access space.
A one-block transfer is performed for one transfer request, and after the transfer the bus is
released. While the bus is released, one or more bus cycles are inserted by the CPU or DTC.
In the transfer end cycle of each block (the cycle in which the transfer counter reaches 0), a one-
state DMA dead cycle is inserted after the DMA write cycle.
One block is transmitted without interruption. NMI generation does not affect block transfer
operation.
Address bus
TEND
Figure 7.22 Example of Full Address Mode (Block Transfer Mode) Transfer
HWR
Bus release
LWR
RD
DMA
read
DMA
write
Block transfer
DMA
read
DMA
write
DMA
dead
release
Bus
DMA
Rev. 3.00 Sep 15, 2006 page 267 of 988
read
Section 7 DMA Controller (DMAC)
DMA
write
Last block transfer
DMA
read
DMA
write
REJ09B0330-0300
DMA
dead
Bus
release