H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 500

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 10 16-Bit Timer Pulse Unit (TPU)
Examples of Buffer Operation
When TGR is an output compare register: Figure 10.19 shows an operation example in which
PWM mode 1 has been designated for channel 0, and buffer operation has been designated for
TGRA and TGRC. The settings used in this example are TCNT clearing by compare match B, 1
output at compare match A, and 0 output at compare match B.
As buffer operation has been set, when compare match A occurs the output changes and the value
in buffer register TGRC is simultaneously transferred to timer general register TGRA. This
operation is repeated each time compare match A occurs.
For details of PWM modes, see section 10.4.6, PWM Modes.
Rev. 3.00 Sep 15, 2006 page 466 of 988
REJ09B0330-0300
TGR0B
TGR0A
H'0000
TGR0C
TGR0A
TIOCA
TCNT value
Transfer
H'0200
H'0200
Figure 10.19 Example of Buffer Operation (1)
H'0200
H'0450
H'0450
H'0450
H'0520
H'0520
Time