H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 252
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H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
(1025 pages)
- Current page: 252 of 1025
- Download datasheet (6Mb)
Section 7 DMA Controller (DMAC)
7.3.4
DMACR is a 16-bit readable/writable register that controls the operation of each DMAC channel.
In full address mode, DMACRA and DMACRB have different functions.
DMACR is initialized to H'0000 by a reset, and in standby mode.
DMACRA:
DMACRB:
Bit 15—Data Transfer Size (DTSZ): Selects the size of data to be transferred at one time.
Bit 14—Source Address Increment/Decrement (SAID)
Rev. 3.00 Sep 15, 2006 page 218 of 988
REJ09B0330-0300
Bit 15
DTSZ
0
1
Bit
DMACRA
Initial value
R/W
Bit
DMACRB
Initial value
R/W
DMA Control Register (DMACR)
Description
Byte-size transfer
Word-size transfer
:
:
:
:
:
:
:
:
DTSZ
R/W
R/W
15
—
0
7
0
SAID
DAID
R/W
R/W
14
0
6
0
DAIDE
SAIDE
R/W
R/W
13
0
5
0
BLKDIR
R/W
R/W
12
—
0
4
0
BLKE
DTF3
R/W
R/W
11
0
3
0
DTF2
R/W
R/W
10
—
0
2
0
DTF1
R/W
R/W
—
9
0
1
0
(Initial value)
DTF0
R/W
R/W
—
8
0
0
0
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