H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 544

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 11 Programmable Pulse Generator (PPG)
NDERL Bits 7 to 0—Next Data Enable 7 to 0 (NDER7 to NDER0): These bits enable or
disable pulse output on a bit-by-bit basis.
11.2.2
PODRH and PODRL are 8-bit readable/writable registers that store output data for use in pulse
output.
Rev. 3.00 Sep 15, 2006 page 510 of 988
REJ09B0330-0300
Bits 7 to 0
NDER7 to NDER0
0
1
PODRH
Bit
Initial value
R/W
PODRL
Bit
Initial value
R/W
Note: * A bit that has been set for pulse output by NDER is read-only.
Output Data Registers H and L (PODRH, PODRL)
:
:
:
:
:
:
POD15
R/(W) *
R/(W) *
POD7
7
0
7
0
Description
Pulse outputs PO7 to PO0 are disabled (NDR7 to NDR0 are not
transferred to POD7 to POD0)
Pulse outputs PO7 to PO0 are enabled (NDR7 to NDR0 are transferred to
POD7 to POD0)
POD14
R/(W) *
R/(W) *
POD6
6
0
6
0
POD13
R/(W) *
R/(W) *
POD5
5
0
5
0
POD12
R/(W) *
R/(W) *
POD4
4
0
4
0
POD11
R/(W) *
R/(W) *
POD3
3
0
3
0
POD10
R/(W) *
R/(W) *
POD2
2
0
2
0
R/(W) *
R/(W) *
POD9
POD1
1
0
1
0
(Initial value)
R/(W) *
R/(W) *
POD8
POD0
0
0
0
0

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