H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 337
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H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
(1025 pages)
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The DTC transfer mode can be normal mode, repeat mode, or block transfer mode.
The 24-bit SAR designates the DTC transfer source address and the 24-bit DAR designates the
transfer destination address. After each transfer, SAR and DAR are independently incremented,
decremented, or left fixed.
Table 8.2 outlines the functions of the DTC.
Table 8.2
Transfer Mode
Normal mode
Repeat mode
Block transfer mode
One transfer request transfers one byte
or one word
Memory addresses are incremented or
decremented by 1 or 2
Up to 65,536 transfers possible
One transfer request transfers one byte
or one word
Memory addresses are incremented or
decremented by 1 or 2
After the specified number of transfers
(1 to 256), the initial state resumes and
operation continues
One transfer request transfers a block
of the specified size
Block size is from 1 to 256 bytes or
words
Up to 65,536 transfers possible
A block area can be designated at
either the source or destination
DTC Functions
Activation Source
IRQ
TPU TGI
SCI TXI or RXI
A/D converter ADI
DMAC DEND
Software
Section 8 Data Transfer Controller (DTC)
Rev. 3.00 Sep 15, 2006 page 303 of 988
Address Registers
Transfer
Source
24 bits
REJ09B0330-0300
Transfer
Destination
24 bits
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