KFM2G16Q2M-DEB5 SAMSUNG [Samsung semiconductor], KFM2G16Q2M-DEB5 Datasheet - Page 88

• Manufacturer Part Number: KFM2G16Q2M-DEB5
• Description: MuxOneNAND FLASH MEMORY
• Manufacturer: SAMSUNG [Samsung semiconductor]

MuxOneNAND1G(KFM1G16Q2M-DEB5)
MuxOneNAND2G(KFN2G16Q2M-DEB5)
OTP Program Operation Flow Chart
Write ’OTP Access’ Command
Note 1) FBA(NAND Flash Block Address) could be omitted or any address.
Write ’DFS*, FBA’ of Flash
Add: F100h DQ=DFS*’, FBA
Write 0 to interrupt register
Write Data into DataRAM
Select DataRAM for DDP
Add: F241h DQ[15]=INT
Add: F241h DQ=0000h
Add: F220h DQ=0065h
Add: F101h DQ=DBS*
low to high transition
Wait for INT register
Add: DP DQ=Data-in
2) Data input could be done anywhere between "Start" and "Write Program Command".
3) FBA should point the unlocked area address among NAND Flash Array address map.
Completed?
Data Input
Start
2)
1)
NO
OTP Programming completed
Write ’BSA, BSC’ of DataRAM
Automatically
Add: F240h DQ[10]=0(Pass)
Write 0 to interrupt register
Add: F200h DQ=BSA, BSC
Add: F200h DQ=BSA, BSC
Add: F107h DQ=FPA, FSA
Write ’FPA, FSA’ of Flash
checked
Write Program command
Add: F241h DQ[15]=INT
/NAND Flash Core reset
Add: F241h DQ=0000h
Add: F100h DQ=FBA
low to high transition
Write ’FBA’ of Flash
DQ=0080h or 001Ah
Wait for INT register
Do Cold/Warm/Hot
Read Controller
Status Register
88
Add: F220h
OTP
OTP Exit
L
=0?
YES
1)
NO
DQ[14]=1(Lock), DQ[10]=1(Error)
Add: F240h DQ[10]=1(Error)
FLASH MEMORY
Add: F241h DQ[15]=INT
/NAND Flash Core reset
Automatically
low to high transition
Wait for INT register
Do Cold/Warm/Hot
Update Controller
updated
Status Register
Read Controller
Status Register
Add: F240h
OTP Exit