KFM2G16Q2M-DEB5 SAMSUNG [Samsung semiconductor], KFM2G16Q2M-DEB5 Datasheet - Page 57

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KFM2G16Q2M-DEB5

Manufacturer Part Number
KFM2G16Q2M-DEB5
Description
MuxOneNAND FLASH MEMORY
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
MuxOneNAND1G(KFM1G16Q2M-DEB5)
MuxOneNAND2G(KFN2G16Q2M-DEB5)
Erase Interrupt (EI)
This is the Erase interrupt bit.
EI Interrupt [5]
Reset Interrupt (RSTI)
This is the Reset interrupt bit.
RSTI Interrupt [4]
2.8.23 Start Block Address Register F24Ch (R/W)
This Read/Write register shows the NAND Flash block address in the Write Protection mode. Setting this register precedes a 'Lock
Block' command, 'Unlock Block' command, or ’Lock-Tight' Command.
F24Ch, default = 0000h
SBA Information[9:0]
15
sets itself to ’1’
sets itself to ’1’
clears to ’0’
clears to ’0’
Status
Status
Item
SBA
14
Reserved(0000000)
Device
13
1Gb
At the completion of an Erase Operation
Cold/Warm/Hot reset is being performed
At the completion of an Reset Operation
12
Start Block Address
(00B0h, 00F0h, 00F3h or
’0’ is written to this bit, or
warm reset is released)
(0094h, 0095h, 0030h)
’0’ is written to this bit
11
Definition
Conditions
Conditions
10
9
Number of Block
8
1024
57
Precedes Lock Block, Unlock Block, or Lock-Tight commands
7
Cold
Cold
0
0
Default State
Default State
6
Warm/hot
Warm/hot
5
SBA
0
1
Description
4
FLASH MEMORY
3
State
Valid
State
Valid
0
1
0
1
0
0
1
0
1
0
SBA
[9:0]
2
Function
Function
interrupt
Interrupt
1
Pending
Pending
off
off
off
off
0

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