KFM2G16Q2M-DEB5 SAMSUNG [Samsung semiconductor], KFM2G16Q2M-DEB5 Datasheet - Page 75

• Manufacturer Part Number: KFM2G16Q2M-DEB5
• Description: MuxOneNAND FLASH MEMORY
• Manufacturer: SAMSUNG [Samsung semiconductor]

MuxOneNAND1G(KFM1G16Q2M-DEB5)
MuxOneNAND2G(KFN2G16Q2M-DEB5)
3.7.4
When the /CE or /OE input is at V
The outputs are placed in the high impedance state.
3.8
The Program operation is used to program data from the on-chip BufferRAMs into the NAND FLASH memory array.
The device has two 2KB data buffers, each 1 Page (2KB + 64B) in size. Each page has 4 sectors of 512B each main area and 16B
spare area. The device can be programmed in units of 1~4 sectors.
The architecture of the DataRAMs permits a simultaneous data-write operation from the Host to one of data buffers and a program
operation from the other data buffer to the NAND Flash Array memory. Refer to Section 3.12.2, "Write While Program Operation", for
more information.
Addressing for program operation
Within a block, the pages must be programmed consecutively from the LSB (least significant bit) page of the block to MSB (most sig-
nificant bit) pages of the block. Random page address programming is prohibited.
Output Disable Mode Operation
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Page 1
Page 0
Program Operation
See Timing Diagram 6.7
From the LSB page to MSB page
DATA IN: Data (1)
Data register
IH
, output from the device is disabled.
(64)
(32)
(3)
(2)
(1)
:
:
Data (64)
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Page 31
Page 2
Page 1
Page 0
Ex.) Random page program (Prohibition)
DATA IN: Data (1)
Data register
FLASH MEMORY
(64)
(32)
(1)
(3)
(2)
:
:
Data (64)