KFM2G16Q2M-DEB5 SAMSUNG [Samsung semiconductor], KFM2G16Q2M-DEB5 Datasheet - Page 102

• Manufacturer Part Number: KFM2G16Q2M-DEB5
• Description: MuxOneNAND FLASH MEMORY
• Manufacturer: SAMSUNG [Samsung semiconductor]

MuxOneNAND1G(KFM1G16Q2M-DEB5)
MuxOneNAND2G(KFN2G16Q2M-DEB5)
5.4
Note
1. If OE is disabled at the same time or before CE is disabled, the output will go to high-z by t
2. It is the following clock of address fetch clock.
Clock
Clock Cycle
Initial Access Time
Burst Access Time Valid Clock to Output Delay
AVD Setup Time to CLK
AVD Hold Time from CLK
AVD High to OE Low
Address Setup Time to CLK
Address Hold Time from CLK
Data Hold Time from Next Clock Cycle
Output Enable to Data
CE Disable to Output High Z
OE Disable to Output High Z
CE Setup Time to CLK
CLK High or Low Time
CLK
CLK to RDY Setup Time
RDY Setup Time to CLK
CE low to RDY valid
If CE is disabled at the same time or before OE is disabled, the output will go to high-z by t
If CE and OE are disabled at the same time, the output will go to high-z by t
2)
to RDY valid
AC Characteristics for Synchronous Burst Read
See Timing Diagrams 6.1, 6.2 and 6.16
Parameter
102
Symbol
OEZ
t
t
t
t
t
t
CLKH/L
t
t
t
OEZ
CLK
t
t
t
CEZ
t
RDYO
t
t
AVDS
AVDH
AVDO
RDYA
RDYS
t
t
t
ACS
ACH
BDH
CES
CER
CLK
IAA
OE
.
BA
1)
1)
OEZ
CEZ
.
.
t
CLK
18.5
Min
1
7
7
0
7
9
4
7
4
-
-
-
-
-
-
-
-
/3
KFM1G16Q2M
FLASH MEMORY
Max
14.5
14.5
14.5
54
76
20
20
17
15
-
-
-
-
-
-
-
-
-
-
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns