HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 599

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

586
Serial Data Transmission (Asynchronous Mode)
Figure 14.5 shows a sample flowchart for serial transmission.
Use the following procedure for serial data transmission after enabling the SCIF for
transmission.
Set RTRG1–0 and TTRG1–0 bits
Set TE or RE bit to 1 in SCSCR,
and set RIE, TIE, and MPIE bits
in SCFCR, and clear TFRST
Set TFRST and RFRST bits
Set transmit/receive format
in SCSCR (leaving TE and
Set CKE1 and CKE0 bits
1-bit interval elapsed?
Clear TE and RE bits
RE bits cleared to 0)
Set value in SCBRR
and RFRST bits to 0
to 0 in SCSCR
to 1 in SCFCR
Initialization
in SCSMR
End
Figure 14.4 Sample SCIF Initialization Flowchart
Yes
Wait
No
1
2
3
4
1. Set the clock selection in SCSCR.
2. Set the transmit/receive format in
3. Write a value corresponding to the bit
4. Wait at least one bit interval, then set
Be sure to clear bits RIE, TIE, and
MPIE, and bits TE and RE, to 0.
When clock output is selected in
asynchronous mode, it is output
immediately after SCSCR settings are
made.
Select input or output for the SCK pin
with the PFC.
SCSMR.
When using IrDA mode, also set
SCIFMR.
rate into the bit rate register (SCBRR).
(Not necessary if an external clock is
used.)
the TE bit or RE bit in SCSCR to 1.
Also set the RIE, TIE, and MPIE bits.
Setting the TE and RE bits enables
the TxD and RxD pins to be used.
When transmitting, the SCIF will go to
the mark state; when receiving, it will
go to the idle state, waiting for a start
bit.