HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 346

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

The EDO mode bit (EDO) in MCR allows selection of ordinary access/high-speed page mode
burst access or ordinary access/burst access using EDO mode. Since OE control is performed in
EDO mode DRAM access, the CAS and OE pins of the SH7615 must be connected to the OE pin
of the DRAM.
Ordinary access in EDO mode is shown in figure 7.45, and burst access in figure 7.46.
In EDO mode, in order to extend the timing for data output to the data bus in a read cycle until the
next assertion of CASn, the DRAM access time can be increased by delaying the data latch timing
by 1/2 cycle, making it at the rise of the CKIO clock.
Figure 7.43 Example of EDO DRAM Connection (32-Bit Data Width)
Chip
CAS/OE
RD/WR
CAS3
CAS2
CAS1
CAS0
RAS
D31
D16
D15
A10
D0
A2
. .
. .
. .
. .
. .
. .
. .
. .
. .
. .
. .
. .
. .
. .
. .
. .
256 k
A8
A0
RAS
OE
WE
I/O15
I/O0
UCAS
LCAS
A8
A0
RAS
OE
WE
I/O15
I/O0
UCAS
LCAS
. .
. .
. .
. .
. .
. .
. .
. .
DRAM
16-bit
329