HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 456

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

10.3
The E-DMAC is connected to the EtherC, and performs efficient transfer of transmit/receive data
between the EtherC and memory (buffers) without the intervention of the CPU. The E-DMAC
itself reads control information, including buffer pointers called descriptors, relating to the buffers.
The E-DMAC reads transmit data from the transmit buffer and writes receive data to the receive
buffer in accordance with this control information. By setting up a number of consecutive
descriptors (a descriptor list), it is possible to execute transmission and reception continuously.
10.3.1
Before starting transmission/reception, the communication program creates transmit and receive
descriptor lists in memory. The start addresses of these lists are then set in the transmit and receive
descriptor list start address registers.
Transmit Descriptor
Figure 10.2 shows the relationship between a transmit descriptor and the transmit buffer.
According to the specification in this descriptor, the relationship between the transmit frame and
transmit buffer can be defined as one frame/one buffer or one frame/multi-buffer.
Note: The descriptor and transmit buffer start address settings must align with a 16-byte
TD0
TD1
TD2
boundary.
Figure 10.2 Relationship between Transmit Descriptor and Transmit Buffer
Operation
Descriptor List and Data Buffers
31
31
Transmit descriptor
31 30 29 28 27 26
TDL
Padding (4 bytes)
16
TBA
TFS26 to TFS0
0
0
Transmit buffer
Valid transmit data
441