HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 435

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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10.2.6
EESR shows communication status information for both the E-DMAC and the EtherC. The
information in this register is reported in the form of interrupt sources. Individual bits are cleared
by writing 1 to them. Each bit can also be masked by means of the corresponding bit in the
EtherC/E-DMAC status interrupt permission register.
Bits 31 to 25—Reserved: These bits should only be written with 0.
Bit 24—Receive Frame Counter Overflow (RFCOF): Indicates that the receive FIFO frame
counter has overflowed.
420
Initial value:
Initial value:
Initial value:
Initial value:
EtherC/E-DMAC Status Register (EESR)
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
RMAF
R/W
31
23
15
0
0
0
7
0
ECI
30
22
14
0
0
R
0
6
0
R/W
TC
29
21
13
0
0
0
5
0
TDE
R/W
R/W
RRF
R/W
ITF
28
20
12
0
0
0
4
0
TFUF
RTLF
CND
R/W
R/W
R/W
27
19
11
0
0
0
3
0
RTSF
R/W
DLC
R/W
R/W
FR
26
18
10
0
0
0
2
0
RDE
PRE
R/W
R/W
R/W
CD
25
17
0
0
9
0
1
0
RFCOF
RFOF
CERF
TRO
R/W
R/W
R/W
R/W
24
16
0
0
8
0
0
0

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