HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 493

• Manufacturer Part Number: HD6417615
• Description: Hardware Manual
• Manufacturer: Hitachi Semiconductor

11.3.4
It can operate in single address mode or dual address mode, as defined by how many bus cycles
the DMAC takes to access the transfer source and transfer destination. The actual transfer
operation timing varies with the DMAC bus mode used: cycle-steal mode or burst mode. The
DMAC supports all the transfers shown in table 11.7.
Table 11.7 Supported DMA Transfers
Source
External device
with DACK
External memory
Memory-mapped
external device
On-chip peripheral
module
On-chip memory
Single: Single address mode
Dual: Dual address mode
Note: * Access size permitted by peripheral module register used as transfer source or transfer
Address Modes:
478
Single Address Mode
In single address mode, both the transfer source and destination are external; one (selectable) is
accessed by a DACK signal while the other is accessed by address. In this mode, the DMAC
performs the DMA transfer in one bus cycle by simultaneously outputting a transfer request
acknowledge DACK signal to one external device to access it, while outputting an address to
the other end of the transfer. Figure 11.6 shows an example of a transfer between external
memory and external device with DACK. That data is written in external memory in the same
bus cycle while the external device outputs data to the data bus.
destination (excluding DMAC, BSC, UBC, cache memory, E-DMAC, and EtherC).
DMA Transfer Types
External
Device with
DACK
Not available
Single
Single
Not available
Not available
External
Memory
Single
Dual
Dual
Dual
Dual
Memory-Mapped
External Device
Single
Dual
Dual
Dual
Dual
Destination
On-Chip
Peripheral
Module
Not available Not available
Dual*
Dual*
Dual*
Dual*
On-Chip
Memory
Dual
Dual
Dual
Dual