HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 531

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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12.2.6
TCR is an 8-bit read/write register that selects the input edge for input capture and selects the
input clock for FRC. TCR is initialized to H'00 by a reset, in standby mode, and when the module
standby function is used.
Bit 7—Input Edge Select (IEDG): Selects whether to capture the input capture input (FTI) on the
falling edge or rising edge.
Bit 7: IEDG
0
1
Bits 6 to 2—Reserved: These bits are always read as 0. The write value should always be 0.
Bits 1 and 0—Clock Select (CKS1, CKS0): These bits select whether to use an external clock or
one of three internal clocks for input to FRC. The external clock is counted at the rising edge.
Bit 1: CKS1
0
1
516
Initial value:
Timer Control Register (TCR)
R/W:
Bit:
Bit 0: CKS0
0
1
0
1
IEDG
R/W
7
0
Description
Input captured on falling edge
Input captured on rising edge
6
0
R
Description
Internal clock: count at /8
Internal clock: count at /32
Internal clock: count at /128
External clock: count at rising edge
5
0
R
4
0
R
3
0
R
2
0
R
CKS1
R/W
1
0
(Initial value)
(Initial value)
CKS0
R/W
0
0

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