HD6417615 Hitachi Semiconductor, HD6417615 Datasheet - Page 370

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HD6417615

Manufacturer Part Number
HD6417615
Description
Hardware Manual
Manufacturer
Hitachi Semiconductor
Datasheet

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8.1.1
Table 8.1 shows the cache register configuration.
Table 8.1
Name
Cache control register
8.2
8.2.1
The cache control register (CCR) is used for cache control. CCR must be set and the cache must
be initialized before use. CCR is initialized to H'00 by a power-on reset or manual reset.
Bits 7 and 6—Way Specification Bit (W1, W0): W1 and W0 specify the way when an address
array is directly accessed by address specification.
Bit 7: W1
0
1
354
Number of bits
Bit
Address
Initial value:
Register Configuration
Register Description
Cache Control Register (CCR)
specification address
Register Configuration
R/W:
Bit:
Access space
31
3
Bit 6: W0
0
1
0
1
R/W
W1
7
0
28
Figure 8.2 Address Configuration
Abbrev.
CCR
R/W
W0
6
0
Description
Way 0
Way 1
Way 2
Way 3
R/W
WB
5
0
19
Tag address
R/W
R/W
R/W
CP
4
0
Initial Value
H'00
R/W
TW
3
0
9
Entry address
6
R/W
OD
2
0
Address
H'FFFFFE92
R/W
3
ID
1
0
4
(Initial value)
Byte address
in line
R/W
CE
0
0
0

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