s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 360

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

UART
UART CONTROL REGISTERS
10-6
UCON0
UCON1
Bit Number
Registers
[1:0]
[4:3]
[2]
[5]
[6]
[7]
Offset Address
Receive mode (RxM)
Rx status interrupt
enable
Transmit mode (TxM)
Data set ready (DSR)
Send break
Look-back mode
0xD004
0xE004
Bit Name
Table 10-5. UART Control Register Description
Table 10-4. UCON0 and UCON1 Registers
R/W
R/W
R/W
This two-bit value determines which function is currently able to
read data from the UART receive buffer register, RBR: '00' =
disable Rx mode, '01' = interrupt request, '10' = GDMA channel 0
request, and '11' = GDMA channel 1 request.
This bit lets the UART generate an interrupt if an exception (a
break, frame error, parity error, or overrun error) occurs during a
receive operation.
If this bit is set to "1", the UART generates a receive status
interrupt. If this bit is "0", the receive status interrupt is not
generated.
This two-bit value determines which function is currently able to
write Tx data to the UART transmit buffer register, UTXBUF. '00' =
disable Tx mode, '01' = interrupt request, '10' = GDMA channel 0
request, and '11' = GDMA channel 1 request.
Setting UCON[5] causes the S3C4510B to assert its data set ready
(DSR) signal output, nUADSR. Clearing this bit to "0" causes the
DSR output to be de-asserted.
Setting UCON0/1[6] to "1" causes the UART to send a break. If it is
"0", a break is not sent.
A break is defined as a continuous Low level signal on the transmit
data output with a duration of more than one frame transmission
time.
By setting this bit when the transmitter is empty (transmitter empty
bit, USTAT[7] = "1"), you can use the transmitter to time the frame.
When USTAT[7] is "1", write the transmit buffer register, UTXBUF,
with the data to be transmitted. Then, poll the USTAT[7] value.
When USTAT[7] returns to "1", clear (reset) the send break bit,
UCON0/1[6].
Setting this bit causes the UART to enter Loop-back mode. In
Loop-back mode, the transmit data output is sent High level and
the transmit buffer register, UTXBUF, is internally connected to the
receive buffer register, URXBUF.
NOTE: This mode is provided for test purposes only. For
UART0 control register
UART1 control register
normal operation, this bit should always be "0".
Description
Reset Value
Reset Value
0x00
0x00
S3C4510B