s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 152

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

SYSTEM MANAGER
Table 4-5 and 4-6
Using big-endian and half-word access, Program/Data path between register and external memory.
HA=Address whose LSB is 0, 2, 4, 6, 8, A, C, E
HAU=Address whose LBS is 2, 6, A, E
CAS3-0/nWBE3-0=0 means active and 1 means inactive
4-10
Bit Num.
CPU Register Data
CPU Address
Bit Num.
CPU Data Bus
Bit Num.
Internal SD Bus
External Address
CAS3-0/nWBE3-0
Bit Num.
XDATA
Bit Num.
Ext. Memory Data
Timing Sequence
Bit Num.
CPU Register Data
CPU Address
Bit Num.
CPU Data Bus
Bit Num.
Internal SD Bus
External Address
CAS3-0/nWBE3-0
Bit Num.
XDATA
Bit Num.
Ext. Memory Data
Timing Sequence
Ext. Memory Type
Ext. Memory Type
Table 4-5. Half-Word Access Store Operation with Big-Endian
Table 4-6. Half-Word Access Load Operation with Big-Endian
XXXX
cdXX
31 16
0011
abab
abab
abcd
cdcd
cdcd
HAL
31 0
31 0
HAL
31 0
HAL
31 0
31 0
HAL
31 0
cd
Word
Word
STORE (CPU Reg
abcd
abcd
31 0
15 0
31 0
LOAD (CPU Reg
ab
HAL=Address whose LSB is 0, 4, 8, C
X=Don't care
XXXX
XXcd
1100
abcd
HAU
cdcd
cdcd
HAU
cdcd
cdcd
31 0
31 0
HAL
31 0
15 0
31 0
31 0
HAL
31 0
cd
Half word
Half word
XXXX
XX00
abab
abab
abcd
cdcd
cdcd
31 0
31 0
31 0
15 0
15 0
15 0
31 0
31 0
15 0
15 0
HA
HA
HA
HA
cd
cd
ab
ab
ab
External Memory)
External Memory)
1st write
1st read
XXXX
XXX0
aXaX
aXaX
cdcd
cdcd
31 0
31 0
31 0
31 0
7 0
7 0
7 0
7 0
HA
HA
a
a
c
c
Byte
abcd
Byte
31 0
15 0
HA
HA
ab
2nd write
2nd read
HA + 1
HA + 1
XXXX
XXX0
cdcd
cdcd
abab
abab
31 0
31 0
31 0
31 0
7 0
7 0
7 0
7 0
d
d
b
b
S3C4510B