s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 255

• Manufacturer Part Number: s3c4510b
• Description: 16/32-bit Risc Microcontroller
• Manufacturer: Samsung Semiconductor, Inc.

S3C4510B
Content Address Memory (CAM) Register
There are 21 CAM entries for the destination address and the pause control packet. For the destination address
CAM value, one destination address consists of 6 bytes. Using the 32-word space (32
therefore maintain up to 21 separate destination addresses.
You use CAM entries 0, 1, and 18 to send pause control packets. To send a pause control packet, you write the
CAM0 entry with the destination address, the CAM1 entry with the source address, and the CAM 18 entry with
length/type, opcode, and operand. You then set the send pause bit in the MAC transmit control register.
CAM
Bit Number
Registers
[31:0]
CAM content (CAM)
0x9100–0x917C
Table 7-16. Content Address Memory (CAM) Register Description
Offset
Bit Name
Table 7-15. CAM Register
R/W
W
The CPU uses the CAM content register as a data base for
destination address. To activate the CAM function, you must
set the appropriate enable bits in CAM enable register.
CAM content (32 words)
Description
Description
ETHERNET CONTROLLER
4 bytes), you can
Reset Value
Undefined
7-33