s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 27

no-image

s3c4510b

Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
s3c4510b01-QE80
Manufacturer:
BOURNS
Quantity:
400 000
Part Number:
s3c4510b01-QE80
Manufacturer:
SUNMNG
Quantity:
853
Part Number:
s3c4510b01-QE80
Manufacturer:
SAMSUNG
Quantity:
8 000
Part Number:
s3c4510b01-QER0
Manufacturer:
AMCC
Quantity:
156
Part Number:
s3c4510b01-QER0
Manufacturer:
SAMSUMG
Quantity:
20 000
Company:
Part Number:
s3c4510b01-QER0
Quantity:
58
Part Number:
s3c4510b01-QERO
Manufacturer:
Panasonic
Quantity:
12 000
Part Number:
s3c4510b01-QERO
Manufacturer:
SAMSUNG
Quantity:
16 615
S3C4510B
2
OVERVIEW
S3C4510B was developed using the advanced ARM7TDMI core designed by advanced RISC machines, Ltd.
Processor Operating States
From the programmer s point of view, the ARM7TDMI can be in one of two states:
— ARM state which executes 32-bit, word-aligned ARM instructions.
— THUMB state which operates with 16-bit, half-word-aligned THUMB instructions. In this state, the PC uses bit
SWITCHING STATE
Entering THUMB State
Entry into THUMB state can be achieved by executing a BX instruction with the state bit (bit 0) set in the operand
register.
Transition to THUMB state will also occur automatically on return from an exception (IRQ, FIQ, UNDEF, ABORT,
SWI etc.), if the exception was entered with the processor in THUMB state.
Entering ARM State
Entry into ARM state happens:
1. On execution of the BX instruction with the state bit clear in the operand register.
2. On the processor taking an exception (IRQ, FIQ, RESET, UNDEF, ABORT, SWI etc.). In this case, the PC is
MEMORY FORMATS
ARM7TDMI views memory as a linear collection of bytes numbered upwards from zero. Bytes 0 to 3 hold the first
stored word, bytes 4 to 7 the second and so on. ARM7TDMI can treat words in memory as being stored either in
Big-Endian or Little-Endian format.
1 to select between alternate half-words.
Transition between these two states does not affect the processor mode or the contents of the registers.
placed in the exception mode s link register, and execution commences at the exception s vector address.
PROGRAMMER S MODEL
NOTE
PROGRAMMER'S MODEL
2-1

Related parts for s3c4510b