s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 269
s3c4510b
Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.S3C4510B.pdf
(422 pages)
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S3C4510B
ETHERNET CONTROLLER OPERATIONS
This section contains additional details about the following operations of the S3C4510B ethernet controller:
— MAC frame and packet formats
— Transmitting a frame
— Receiving a frame
— Full-duplex pause operation
— Error signalling and network management
MAC Frame and Packet Formats
The MAC transmits each byte of all fields, except the FCS, least-significant bit first. In this document, the term
"packet" is used to denote all of the bytes that are transmitted and received, while "frame" refers only to the bytes
delivered by the station for transmission, and to the station who is receiving.
Table 7-44 lists the eight fields in a standard data packet (IEEE 802.3/Ethernet frame). See also Figure 7-13.
Preamble
Start frame delimiter
(SFD)
Destination address
Source address
Length or type
Logical link control
(LLC) data
PAD
Frame check
sequence (FCS)
Field Name
46 to 1500 bytes Data bytes used for logical link control.
Table 7-44. MAC Frame and Package Format Description
0 to 46 bytes
Field Size
7 bytes
6 bytes
6 bytes
2 bytes
4 bytes
1 byte
The bits in each preamble byte are 10101010, transmitted from left
to right.
The SFD bits are 10101011, transmitted from left to right.
The destination address can be an individual address or a multicast
(or broadcast) address.
The MAC does not interpret the source address bytes. However, to
qualify as a valid station address, the first bit transmitted (the LSB
of the first byte) must be a "0".
The MAC treats length fields greater than 1500 bytes as type fields.
Byte values less than or equal to 1500 indicate the number of
logical link control (LLC) data bytes in the data field. The MAC
transmits the high-order byte first.
If the LLC data is less than 46 bytes long, the MAC transmits pad
bytes of all zeros.
The FCS field contains a 16-bit error detection code that is
computed as a function of all fields except the preamble, the SFD,
and the FCS itself. The FCS - 32 polynomial function is as follows: "
X32 + X26 + X23 + X16 + X12 + X11 + X10 + X8 + X7 + X5 + X4 +
X2 + X1 + 1".
Description
ETHERNET CONTROLLER
7-47
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