s3c4510b Samsung Semiconductor, Inc., s3c4510b Datasheet - Page 32

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s3c4510b

Manufacturer Part Number
s3c4510b
Description
16/32-bit Risc Microcontroller
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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PROGRAMMER'S MODEL
The THUMB State Register Set
The THUMB state register set is a subset of the ARM state set. The programmer has direct access to eight
general registers, R0–R7, as well as the Program Counter (PC), a stack pointer register (SP), a link register (LR),
and the CPSR. There are banked stack pointers, link registers and Saved Process Status Registers (SPSRs) for
each privileged mode. This is shown in Figure 2-4.
2-6
System & User
R0
R1
R2
R3
R4
R5
R6
R7
SP
LR
PC
= banked register
CPSR
SPSR_fiq
THUMB State General Registers and Program Counter
Figure 2-4. Register Organization in THUMB State
SP_fiq
LR_fiq
R0
R1
R2
R3
R4
R5
R6
R7
PC
CPSR
FIQ
THUMB State Program Status Registers
Supervisor
SPSR_svc
SP_svg
LR_svc
R0
R1
R2
R3
R4
R5
R6
R7
PC
CPSR
SPSR_abt
SP_abt
About
R0
R1
R2
R3
R4
R5
R6
R7
LR_abt
PC
CPSR
SPSR_irq
R0
R1
R2
R3
R4
R5
R6
R7
PC
SP_irq
LR_irq
CPSR
IRG
Undefined
SPSR_und
SP_und
R0
R1
R2
R3
R4
R5
R6
R7
LR_und
PC
CPSR
S3C4510B

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