sed1374 ETC-unknow, sed1374 Datasheet - Page 95

• Manufacturer Part Number: sed1374
• Description: Sed1374 Embedded Memory Color Lcd Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
13.6 Clock Requirements
Hardware Functional Specification
Issue Date: 99/04/29
Hardware Power Save
Software Power Save
Register Read/Write
Memory Read/Write
Function
The following table shows what clock is required for which function in the SED1374.
Is required during register accesses. BCLK
can be shut down between accesses: allow
eight BCLK pulses plus 12 MCLK pulses
(8T
before shutting BCLK off. Allow one BCLK
pulse after starting up BCLK before the next
access
Is required during memory accesses. BCLK
can be shut down between accesses: allow
eight BCLK pulses plus 12 MCLK pulses
(8T
before shutting BCLK off. Allow one BCLK
pulse after starting up BCLK before the next
access
Table 13-5: SED1374 Internal Clock Requirements
BCLK
BCLK
+ 12T
+ 12T
MCLK
MCLK
Not Required
Required
BCLK
) after the last access
) after the last access
Can be stopped after 128 frames from
entering Software Power Save, i.e. after
REG[03h] bits 1-0 = 11
Can be stopped after 128 frames from
entering Hardware Power Save
Not Required
Required
CLKI
X26A-A-001-02
SED1374
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