sed1374 ETC-unknow, sed1374 Datasheet - Page 305

• Manufacturer Part Number: sed1374
• Description: Sed1374 Embedded Memory Color Lcd Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
2.1.2 LCD Memory Access Cycles
Interfacing to the NEC VR4102™ Microprocessor
Issue Date: 99/01/05
LCDRDY
ADD[25:0]
D[15:0]
D[15:0]
LCDCS#
WR#,RD#
(write)
TCLK
(read)
SHB#
Figure 2-1: “NEC VR4102 Read/Write Cycles,” on page 9 shows the read and write cycles
to the LCD Controller Interface.
Once an address in the LCD block of memory is placed on the external address bus,
ADD[25:0], the LCD chip select, LCDCS#, is driven low. The read or write enable signals,
RD# and WR#, are driven low for the appropriate cycle and LCDRDY is driven low to
insert wait states into the cycle. The high byte enable is driven low for 16-bit transfers and
high for 8-bit transfers.
Figure 2-1: NEC VR4102 Read/Write Cycles
Hi-Z
VALID
VALID
VALID
X26A-G-008-04
SED1374
Hi-Z
Page 9