sed1374 ETC-unknow, sed1374 Datasheet - Page 369
sed1374
Manufacturer Part Number
sed1374
Description
Sed1374 Embedded Memory Color Lcd Controller
Manufacturer
ETC-unknow
Datasheet
1.SED1374.pdf
(420 pages)
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Epson Research and Development
Vancouver Design Center
4 MCF5307 To SED1374 Interface
4.1 Hardware Description
Interfacing to the Motorola MCF5307 "ColdFire" Microprocessor
Issue Date: 99/01/05
Figure 4-1: Typical Implementation of MCF5307 to SED1374 Interface
The SED1374 is interfaced to the MCF5307 with a minimal amount of glue logic. One
inverter is required to change the polarity of the WAIT# signal, which is an active low
signal to insert wait states in the bus cycle, while the MCF5307’s Transfer Acknowledge
signal (TA) is an active low signal to end the current bus cycle. The inverter is enabled by
CS# so that TA is not driven by the SED1374 during non-SED1374 bus cycles. A single
resistor is used to speed up the rise time of the WAIT# (TA) signal when terminating the
bus cycle.
The following diagram shows a typical implementation of the MCF5307 to SED1374
interface.
MCF5307
A[16:31]
BCLK0
RESET
D[0:15]
WE3
WE2
CS4
OE
TA
Vcc
470
RD/WR#
DB[15:0]
WE1#
AB[15:0]
WE0#
CS#
WAIT#
RESET#
RD#
BUSCLK
SED1374
X26A-G-011-02
SED1374
Page 13
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