sed1374 ETC-unknow, sed1374 Datasheet - Page 306

• Manufacturer Part Number: sed1374
• Description: Sed1374 Embedded Memory Color Lcd Controller
• Manufacturer: ETC-unknow

Page 10
3 SED1374 Host Bus Interface
3.1 Bus Interface Modes
SED1374
X26A-G-008-04
Pin Names
SED1374
DB[15:0]
RD/WR#
RESET#
AB[15:1]
WAIT#
WE1#
WE0#
BCLK
AB0
CS#
BS#
RD#
RD/WR#
RESET#
D[15:0]
A[15:1]
WAIT#
WE1#
WE0#
CSn#
CKIO
SH-3
RD#
BS#
A0
This section is a summary of the host bus interface modes available on the SED1374 and
offers some detail on the Generic #2 host bus interface used to implement the interface to
the VR4102.
The SED1374 implements a 16-bit interface to the host microprocessor which may operate
in one of several modes compatible with most of the popular embedded microprocessor
families. Six bus interface modes are supported:
• Hitachi SH-4.
• Hitachi SH-3
• Motorola MC68000 (using Upper Data Strobe/Lower Data Strobe).
• Motorola MC68020/MC68030/MC683xx (using Data Strobe/DSACKx).
• Generic #1 (Chip Select, plus individual Read Enable/Write Enable for each byte).
• Generic #2 (External Chip Select, shared Read/Write Enable for high byte, individual
The SED1374 latches CNF[2:0] and BS# to allow selection of the host bus interface on the
rising edge of RESET#. After releasing reset, the bus interface signals assume their selected
configuration. The following table shows the functions of each host bus interface signal.
Read/Write Enable for low byte).
RD/WR#
RESET#
A[15:1]
D[15:0]
WE1#
WE0#
RDY#
CSn#
CKIO
SH-4
RD#
BS#
Table 3-1: Host Bus Interface Pin Mapping
A0
connect to IO V
connect to IO V
External Decode External Decode External Decode
MC68K #1
DTACK#
RESET#
A[15:1]
D[15:0]
UDS#
LDS#
R/W#
CLK
AS#
DD
DD
MC68K #2
DSACK1#
RESET#
D[31:16]
A[15:1]
R/W#
SIZ1
SIZ0
DS#
CLK
AS#
A0
Interfacing to the NEC VR4102™ Microprocessor
connect to V
Generic #1
RESET#
Epson Research and Development
A[15:1]
D[15:0]
WAIT#
WE1#
BCLK
WE0#
RD1#
RD0#
A0
SS
Vancouver Design Center
connect to IO V
connect to IO V
Issue Date: 99/01/05
External Decode
Generic #2
RESET#
A[15:1]
D[15:0]
WAIT#
BHE#
BCLK
WE#
RD#
A0
DD
DD