sed1374 ETC-unknow, sed1374 Datasheet - Page 39

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sed1374

Manufacturer Part Number
sed1374
Description
Sed1374 Embedded Memory Color Lcd Controller
Manufacturer
ETC-unknow
Datasheet

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Epson Research and Development
Vancouver Design Center
7.1.4 Motorola M68K #2 Interface Timing
Hardware Functional Specification
Issue Date: 99/04/29
Symbol
SIZ0, SIZ1
DSACK1#
T
D[31:16]
f
D[31:16]
t10
CLK
A[15:0]
CLK
t1
t2
t3
t4
t5
t6
t7
t8
t9
(write)
(read)
R/W#
CLK
CS#
AS#
DS#
Bus Clock frequency
Bus Clock period
A[15:0], CS#, SIZ0, SIZ1 valid before AS# falling edge
A[15:0], CS#, SIZ0, SIZ1 hold from AS#, DS# rising edge
AS# low to DSACK1# driven high
CLK to DSACK1# low
AS# high to DSACK1# high
AS# high to DSACK1# high impedance
DS# falling edge to D[31:16] valid (write cycle)
AS#, DS# rising edge to D[31:16] invalid (write cycle)
D[31:16] valid to DSACK1# low (read cycle)
AS#, DS# rising edge to D[31:16] high impedance
Note
T
Hi-Z
Hi-Z
Hi-Z
CLK
CLK may be turned off (held low) between accesses - see Section 13.5, “Turning Off
BCLK Between Accesses” on page 86
t1
t3
Figure 7-4: M68K #2 Timing (MC68030)
Table 7-4: M68K #2 Timing (MC68030)
t7
Parameter
t9
VALID
t4
VALID
VALID
1/f
Min
t2
t8
0
0
0
0
CLK
0
t5
t10
t6
T
CLK
T
Max
20
33
22
18
26
Hi-Z
CLK
/ 2
Hi-Z
Hi-Z
X26A-A-001-02
SED1374
Units
MHz
Page 31
ns
ns
ns
ns
ns
ns
ns
ns

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