sed1374 ETC-unknow, sed1374 Datasheet - Page 51

• Manufacturer Part Number: sed1374
• Description: Sed1374 Embedded Memory Color Lcd Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
7.3.6 Single Color 8-Bit Panel Timing (Format 1)
VDP =
VNDP =
HDP =
HNDP =
Hardware Functional Specification
Issue Date: 99/04/29
* Diagram drawn with 2 FPLINE vertical blank period
Example timing for a 640x480 panel
FPDAT[7:0]
FPSHIFT 2
FPFRAME
Vertical Display Period
Vertical Non-Display Period
Horizontal Display Period
Horizontal Non-Display Period
FPSHIFT
FPDAT7
FPDAT6
FPDAT5
FPDAT4
FPDAT3
FPDAT2
FPDAT1
FPDAT0
FPLINE
FPLINE
Figure 7-16: Single Color 8-Bit Panel Timing (Format 1)
1-G2
1-G4
1-R1
1-B1
1-R3
1-B3
1-R5
1-B5
LINE1
1-G5
1-G1
1-R2
1-B2
1-R4
1-R6
1-G3
1-B4
LINE2
1-G10
1-R11
1-G6
1-R7
1-B7
1-R9
1-B9
1-G8
= (REG[06h] bits 1-0, REG[05h] bits 7-0) + 1 Lines
= REG[0Ah] bits 5-0 Lines
= ((REG[04h] bits 6-0) + 1) x 8Ts
= (REG[08h] + 4) x 8Ts
1-R10
1-G11
1-B10
1-G7
1-R8
1-G9
1-B6
1-B8
LINE3
1-G12
1-R13
1-G14
1-R15
1-B15
1-G16
1-B11
1-B13
LINE4
VDP
1-G13
1-G15
1-R16
HDP
1-R12
1-B12
1-B14
1-B16
1-R14
LINE479 LINE480
1-G639
1-B640
1-R636
1-B636
1-G637
1-R638
1-B638
1-R640
VNDP
HNDP
LINE1
LINE2
X26A-A-001-02
SED1374
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