sed1374 ETC-unknow, sed1374 Datasheet - Page 63

• Manufacturer Part Number: sed1374
• Description: Sed1374 Embedded Memory Color Lcd Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
bit 4
bit 3
bit 2
bits 1-0
Hardware Functional Specification
Issue Date: 99/04/29
REG[01h] bit 7
TFT/STN
0
1
Color/Mono
REG[01h] bit 5
0
1
FPLINE Polarity
This bit controls the polarity of FPLINE in TFT/MD-TFD mode (no effect in passive
panel mode). When this bit = 0, FPLINE is active low. When this bit = 1, FPLINE is active
high.
FPFRAME Polarity
This bit controls the polarity of FPFRAME in TFT/MD-TFD mode (no effect in passive
panel mode). When this bit = 0, FPFRAME is active low. When this bit = 1, FPFRAME is
active high.
Mask FPSHIFT
FPSHIFT is masked during non-display periods if either of the following two criteria is
met:
Data Width Bits [1:0]
These bits select the display data format. See Table 8-1: “Panel Data Format” below.
X (don’t care)
Dual/Single
REG[01h] bit 6
1. Color passive panel is selected (REG[01h] bit 5 = 1)
2. This bit (REG[01h] bit 2) = 1
0
1
0
1
REG[01h] bit 1
Data Width
Table 8-1: Panel Data Format
Bit 1
0
1
0
1
0
1
0
1
REG[01h] bit 0
Data Width
Bit 0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Color Single 8-bit passive LCD format 1
Color Single 8-bit passive LCD format 2
Mono Single 4-bit passive LCD
Mono Single 8-bit passive LCD
Color Single 4-bit passive LCD
Mono Dual 8-bit passive LCD
Color Dual 8-bit passive LCD
12-bit TFT/MD-TFD panel
9-bit TFT/MD-TFD panel
Function
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
reserved
X26A-A-001-02
SED1374
Page 55