sed1374 ETC-unknow, sed1374 Datasheet - Page 365

• Manufacturer Part Number: sed1374
• Description: Sed1374 Embedded Memory Color Lcd Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
2.1.3 Burst Cycles
Interfacing to the Motorola MCF5307 "ColdFire" Microprocessor
Issue Date: 99/01/05
SIZ[1:0], TT[1:0]
SIZ[1:0], TT[1:0]
Burst cycles are very similar to normal cycles, except that they occur as a series of four
back-to-back, 32-bit memory reads or writes, with the TIP (Transfer In Progress) output
asserted continuously through the burst. Burst memory cycles are mainly intended to facil-
itate cache line fill from program or data memory; they are typically not used for transfers
to or from IO peripheral devices such as the SED1374. The MCF5307 chip selects provide
a mechanism to disable burst accesses for peripheral devices which are not able to support
them.
D[31:0]
BCLK0
A[31:0]
R/W
TIP
Transfer Start
TS
TA
D[31:0]
BCLK0
A[31:0]
R/W
TIP
Transfer Start
TS
TA
Figure 2-2: MCF5307 Memory Write Cycle
Figure 2-1: MCF5307 Memory Read Cycle
Wait States
Valid
Wait States
Complete
Transfer
Complete
Transfer
Next Transfer
Sampled when TA low
Starts
Next Transfer
Starts
X26A-G-011-02
SED1374
Page 9