sed1374 ETC-unknow, sed1374 Datasheet - Page 250

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sed1374

Manufacturer Part Number
sed1374
Description
Sed1374 Embedded Memory Color Lcd Controller
Manufacturer
ETC-unknow
Datasheet

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Page 18
6.13 CPU/Bus Interface Header Strips
SED1374
X26A-G-005-01
Note
All of the CPU/Bus interface pins of the SED1374 are connected to the header strips H1
and H2 for easy interface to a CPU/Bus other than ISA.
Refer to Table 4-1: “CPU/BUS Connector (H1) Pinout,” on page 11 and Table 4-2:
“CPU/BUS Connector (H2) Pinout,” on page 12 for specific settings.
These headers only provide the CPU/Bus interface signals from the SED1374. When
another host bus interface is selected by CNF[3:0] and BS#, appropriate external decode
logic MUST be used to access the SED1374. Refer to Table 5-1: “Host Bus Interface
Pin Mapping,” on page 13 for connection details.
SDU1374B0C Rev. 1.0 ISA Bus Evaluation Board User Manual
Epson Research and Development
Vancouver Design Center
Issue Date: 98/10/26

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