sed1374 ETC-unknow, sed1374 Datasheet - Page 127

• Manufacturer Part Number: sed1374
• Description: Sed1374 Embedded Memory Color Lcd Controller
• Manufacturer: ETC-unknow

Epson Research and Development
Vancouver Design Center
5.3.1 Registers
Programming Notes and Examples
Issue Date: 99/04/27
REG[14] Screen 1 Vertical Size (MSB)
n/a
REG[13] Screen 1 Vertical Size (LSB)
Bit 7
Bit 6
n/a
The other registers required for split screen operations, REG[0Ch] through REG[0Dh]
(Screen 1 Start Word Address) and REG[0Fh] through REG[10h] (Screen 2 Start Word
Address) are described in Section 5.2.1 on page 28.
These two registers form a ten bit value which determines the size of screen 1. When the
vertical size is equal to or greater than the physical number of lines being displayed there
is no visible effect on the display. When the vertical size value is less than the number of
physically displayed lines, display operation works like this:
Screen 1 memory is always displayed at the top of the screen followed by screen 2 memory.
The start address for the screen 2 image may be lower in memory than that of screen 1 (i.e.
screen 2 could be coming from offset 0 in the display buffer while screen 1 was coming
from an offset located several thousand bytes into the display buffer). While not particu-
larly useful, it is even possible to set screen 1 and screen 2 to the same address.
1. From the end of vertical non-display (beginning of a frame) to the number of lines in-
2. After vertical size lines have been displayed the system will begin displaying data
dicated by vertical size the display data will come from the memory pointed to by the
Screen 1 Display Start Address.
from Screen 2 Display Start Address memory.
Bit 5
n/a
Figure 5-5: Screen 1 Vertical Size
Bit 4
n/a
Bit 3
n/a
Bit 2
n/a
Bit 1
Bit 9
Bit 0
Bit 8
X26A-G-002-02
SED1374
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