pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 48

• Manufacturer Part Number: pef2256e
• Description: E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
• Manufacturer: Infineon Technologies Corporation

Table 5
Pin (Ball)
No.
17 (G3)
18 (G2)
Unused Pins
- (E5)
Note: oD = open drain output
User’s Manual
Hardware Description
PP = push/pull output
PU = input or input/output comprising an internal pullup device
To override the internal pullup by an external pulldown, a resistor value of 22 k
is recommended.
The pullup devices are activated during reset, this means their state is undefined
until the reset signal has been applied.
Unused input pins containing pullups can be left open. Unused input pins without
pullups shall be connected to V
pins shall be left open.
Name
TCK
TDO
N.C.
Miscellaneous Pin Definitions (cont’d)
Pin
Type
I
O
Buffer
Type
PU
DD
or V
Function
Test Clock
Boundary scan test clock.
Test Data Output
Boundary scan output signal.
Reserved
This ball is not connected within the
P-LBGA-81-1 package but should be left
open for compatibility with future products.
There are no unused pins in the
P-MQFP-80-1 package.
48
SS
level to prevent floating. Unused output
External Signals
DS1.1, 2003-10-23
PEF 2256 H/E
FALC
®
56
Ω