pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 312

• Manufacturer Part Number: pef2256e
• Description: E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
• Manufacturer: Infineon Technologies Corporation

Code Violation Counter (Read)
CVCL
CVCH
CV(15:0)
User’s Manual
Hardware Description
CV15
CV7
7
7
Code Violations
No function if NRZ code has been enabled.
If the HDB3 or the CMI code with HDB3-precoding is selected, the
16-bit counter is incremented when violations of the HDB3 code are
detected. The error detection mode is determined by programming
the bit FMR0.EXTD.
If simple AMI coding is enabled (FMR0.RC0/1 = 10) all bipolar
violations are counted. The error counter does not roll over.
During alarm simulation, the counter is incremented every four bits
received up to its saturation.
Clearing and updating the counter is done according to bit
FMR1.ECM.
If this bit is reset the error counter is permanently updated in the
buffer. For correct read access of the error counter bit DEC.DCVC
has to be set. With the rising edge of this bit updating the buffer is
stopped and the error counter is reset. Bit DEC.DCVC is reset
automatically with reading the error counter high byte.
If FMR1.ECM is set every second (interrupt ISR3.SEC) the error
counter is latched and then automatically reset. The latched error
counter state should be read within the next second.
312
DS1.1, 2003-10-23
PEF 2256 H/E
CV0
CV8
E1 Registers
0
0
FALC
(52)
(53)
®
56