pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 341

• Manufacturer Part Number: pef2256e
• Description: E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
• Manufacturer: Infineon Technologies Corporation

XREP3
RLI3
CEC3
Receive Signaling Status Register 3 (Read)
Value after reset: 00
RSIS3
RSIS3 relates to the last received HDLC channel 3 frame; it is copied into RFIFO3 when
end-of-frame is recognized (last byte of each stored frame).
VFR3
User’s Manual
Hardware Description
VFR3
Transmission Repeat - HDLC Channel 3
Status indication of CMDR3.XREP3.
Receive Line Inactive - HDLC Channel 3
Neither flags as interframe time fill nor frames are received via the
signaling time slot.
Command Executing - HDLC Channel 3
0 =
1 =
Note:CEC3 will be active up to 2.5 periods of the current system data
Valid Frame - HDLC Channel 3
Determines whether a valid frame has been received.
1 =
0 =
An invalid frame is either
– a frame which is not an integer number of 8 bits (n× 8 bits) in length
– a frame which is too short taking into account the operation mode
RDO3
H
(e.g. 25 bits), or
selected via MODE3 (MDS3(2:0)) and the selection of receive CRC
ON/OFF (CCR4.RCRC3) as follows:
• MDS3(2:0)=011 (16 bit Address),
• MDS3(2:0)=010 (8 bit Address),
RCRC3=0: 4 bytes; RCRC3=1: 3 or 4 bytes
RCRC3=0: 3 bytes; RCRC3=1: 2 or 3 bytes
No command is currently executed, the CMDR4 register can be
written to.
A command (written previously to CMDR4) is currently
executed, no further command can be temporarily written in
CMDR4 register.
rate.
Valid
Invalid
CRC163
RAB3
341
HA13
HA03
DS1.1, 2003-10-23
PEF 2256 H/E
LA3
E1 Registers
FALC
(9B)
®
56