pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 123

• Manufacturer Part Number: pef2256e
• Description: E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
• Manufacturer: Infineon Technologies Corporation

5.1.3
The FALC
reachable length with a 22 AWG twisted-pair cable is 2000 m (~6560 ft.). The integrated
receive equalization network recovers signals with up to -36 dB of cable attenuation in
long-haul mode. Noise filters eliminate the higher frequency part of the received signals.
The incoming data is peak-detected and sliced to produce the digital data stream. The
slicing level is software selectable in four steps (45%, 50%, 55%, 67%). The received
data is then forwarded to the clock and data recovery unit. The receive equalizer
characteristics are programmable to enable the use of non-standard cable types or to
adapt to special receive conditions.
5.1.4
Status register RES reports the current receive line attenuation in a range from 0 to
-36 dB in 25 steps of approximately 1.4 dB each. The least significant 5 bits of this
register indicate the cable attenuation in dB. These 5 bits are only valid in combination
with the most significant two bits (RES.EV1/0 = 01).
5.1.5
The analog received signal on port RL1/2 is equalized and then peak-detected to
produce a digital signal. The digital received signal on port RDIP/N is directly forwarded
to the DPLL. The receive clock and data recovery extracts the route clock RCLK from
the data stream received at the RL1/2, RDIP/RDIN or ROID lines and converts the data
stream into a single-rail, unipolar bit stream. The clock and data recovery uses an
internally generated high frequency clock based on MCLK.
The recovered route clock or a de-jittered clock can be output on pin RCLK as shown in
Table
See also
User’s Manual
Hardware Description
26.
Table 29
®
Receive Equalization Network (T1/J1)
56 automatically recovers the signals received on pins RL1/2. The maximum
Receive Line Attenuation Indication (T1/J1)
Receive Clock and Data Recovery (T1/J1)
on page
130
for details of master/slave clocking.
123
Functional Description T1/J1
DS1.1, 2003-10-23
PEF 2256 H/E
FALC
®
56