pef2256e Infineon Technologies Corporation, pef2256e Datasheet - Page 210
pef2256e
Manufacturer Part Number
pef2256e
Description
E1/t1/j1 Framer And Line Interface Component For Long- And Short-haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF2256E.pdf
(518 pages)
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7.4
The FALC
configuration for this mode is
•
•
•
•
7.5
Some output signals can be switched into tristate mode if unused or for wired-OR
configurations. See
Table 60
Signal
RCLK
RDO
RSIG
SEC/FSC
RPA
RPB
RPC
RPD
XPA
XPB
XPC
XPD
XL1
XL2
D(15:0)
User’s Manual
Hardware Description
1.544 MHz input clock on RL1/RL2
1.544 MHz output clock on XL1/XL2
Transmit clock referenced by SCLKX (CMR1.DXSS = 0)
Transmit pulse mask set to XMP0 = FF
®
56 can be used to receive and transmit clock information instead of data . The
Digital Clock Interface Mode
Output Signal Tristate Modes
Output Tristate Programming (T1/J1)
Tristate Mode Selection
PC5.CRP = 0
SIC3.RTRI = 1
SIC3.FSCT = 1
PC1.RPC(3:0) = 1001
PC2.RPC(3:0) = 1001
PC3.RPC(3:0) = 1001
PC4.RPC(3:0) = 1001
PC1.XPC(3:0) = 1001
PC2.XPC(3:0) = 1001
PC3.XPC(3:0) = 1001
PC4.XPC(3:0) = 1001
XPM2.XLT = 1
or
PC1.XPC(3:0) = 1000
or
PC2.XPC(3:0) = 1000
or
PC3.XPC(3:0) = 1000
or
PC4.XPC(3:0) = 1000
WR = low
Table 60
B
for more detail.
B
B
B
B
B
B
B
B
B
B
B
B
B
and XPA = high
and XPB = high
and XPC = high
and XPD = high
210
H
, XPM1 = BD
Operational Description T1/J1
H
, and XPM2 = 07
Note
Internal pull-up active
During inactive channel
phases only
Internal pull-up active
Internal pull-up active
Internal pull-up active
Internal pull-up active
Internal pull-up active
Internal pull-up active
Internal pull-up active
Internal pull-up active
DS1.1, 2003-10-23
PEF 2256 H/E
H
FALC
®
56
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