mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 474

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mc68hc916y3

Manufacturer Part Number
mc68hc916y3
Description
Mc68hc16y3 16 Bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
T2CF — T2CLK Pin Filter Control
DTPU — Disable TPU2 Pins
D.10.16 TPU2 Parameter RAM
D-96
MOTOROLA
When asserted, the T2CLK input pin in the TPU2 is filtered with the same filter clock
that is supplied to the channels. This control bit is write once after reset.
In the TPU2, when the disable TPU2 control pin is asserted, pin TP15 is configured as
an input disable pin. When the TP15 pin value is zero, all TPU2 output pins are three-
stated, regardless of the pins function. The input is not synchronized. This control bit
is write once after reset.
The channel parameter registers are organized as one hundred 16-bit words of RAM.
Channels 0 to 15 have eight parameters. The parameter registers constitute a shared
work space for communication between the CPU16 and the TPU2. The TPU2 can only
access data in the parameter RAM. Refer to Table D-62.
Table D-61 System Clock Frequency/Minimum Guaranteed Detected Pulse
0 = Uses fixed four-clock filter
1 = T2CLK input pin filtered with same filter clock that is supplied to the channels.
0 = TP15 functions as normal TPU2 channel.
1 = TP15 pin configured as output disable pin. When TP15 pin is low, all TPU2 out-
Filter Control
put pins are in a high-impedance state, regardless of the pin function.
000
001
010
011
100
101
110
111
Freescale Semiconductor, Inc.
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16
32
64
2
4
8
16.7 MHz
1.92 s
12.8 s
2.56 s
240 ns
480 ns
960 ns
3.2 s
6.4 s
10.24 s
20.48 s
MC68HC16Y3/916Y3
2.12 s
5.12 s
20 MHz
200 ns
400 ns
800 ns
1.6 s
USER’S MANUAL

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