mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 454

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

STOP — Stop Clocks
FRZ1 — Not Implemented
FRZ0 — FREEZE Assertion Response
STOPP — Stop Prescaler
INCP — Increment Prescaler
SUPV — Supervisor/Unrestricted Data Space
IARB[3:0] — Interrupt Arbitration ID
D.9.2 GPT Test Register
GPTMTR — GPT Module Test Register
D.9.3 GPT Interrupt Configuration Register
ICR —GPT Interrupt Configuration Register
IPA[3:0] — Interrupt Priority Adjust
D-76
MOTOROLA
15
0
RESET:
This bit has no effect because the CPU16 always operates in supervisor mode.
The IARB field is used to arbitrate between simultaneous interrupt requests of the
same priority. Each module that can generate interrupt requests must be assigned a
unique, non-zero IARB field value.
Used for factory test only.
ICR fields determine internal and external interrupt priority, and provide the upper
nibble of the interrupt vector number supplied to the CPU when an interrupt is
acknowledged.
This field specifies which GPT interrupt source is given highest internal priority. Refer
to Table D-46.
0 = GPT clock operates normally.
1 = GPT clock is stopped.
0 = Ignore IMB FREEZE signal.
1 = FREEZE the current state of the GPT.
0 = Normal operation.
1 = Stop prescaler and pulse accumulator from incrementing. Ignore changes to
0 = Has no effect.
1 = If STOPP is asserted, increment prescaler once and clock input synchronizers
14
0
IPA[3:0]
input pins.
once.
13
0
12
0
Freescale Semiconductor, Inc.
11
0
0
For More Information On This Product,
10
0
Go to: www.freescale.com
IPL[2:0]
9
0
8
0
7
0
6
0
IVBA[3:0]
5
0
4
0
3
0
0
MC68HC16Y3/916Y3
USER’S MANUAL
2
0
0
$YFFA904
$YFF902
1
0
0
0
0
0