mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 112

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

5.2.4 Show Internal Cycles
5.2.5 Register Access
5.2.6 Freeze Operation
5.3 System Clock
5-4
MOTOROLA
A show cycle allows internal bus transfers to be monitored externally. The SHEN field
in SCIMCR determines what the external bus interface does during internal transfer
operations. Table 5-1 shows whether data is driven externally, and whether external
bus arbitration can occur. Refer to 5.6.6.1 Show Cycles for more information.
MC68HC16Y3/916Y3 MCUs always operates at the supervisor level. The state of the
SUPV bit has no meaning.
The FREEZE signal halts MCU operations during debugging. FREEZE is asserted in-
ternally by the CPU16 if a breakpoint occurs while background mode is enabled. When
FREEZE is asserted, only the bus monitor, software watchdog, and periodic interrupt
timer are affected. The halt monitor and spurious interrupt monitor continue to operate
normally. Setting the freeze bus monitor (FRZBM) bit in SCIMCR disables the bus
monitor when FREEZE is asserted. Setting the freeze software watchdog (FRZSW)
bit disables the software watchdog and the periodic interrupt timer when FREEZE is
asserted.
The system clock in the SCIM2 provides timing signals for the IMB modules and for an
external peripheral bus. Because the MCU is a fully static design, register and memory
contents are not affected when the clock rate changes. System hardware and software
support changes in clock rate during operation.
The system clock signal can be generated from one of three sources. An internal
phase-locked loop (PLL) can synthesize the clock from a fast reference, a slow refer-
ence, or the clock signal can be directly input from an external frequency source.
Whether the PLL can use a fast or slow reference is determined by
the device. A particular device cannot use both a fast and slow
reference.
SHEN[1:0]
00
01
10
11
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 5-1 Show Cycle Enable Bits
Show cycles disabled, external arbitration enabled
Show cycles enabled, external arbitration disabled
Show cycles enabled, external arbitration enabled
Show cycles enabled, external arbitration enabled;
internal activity is halted by a bus grant
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MC68HC16Y3/916Y3
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