mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 240

• Manufacturer Part Number: mc68hc916y3
• Description: Mc68hc16y3 16 Bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

11.3.2 QSPI RAM
11.3.2.1 Receive RAM
11.3.2.2 Transmit RAM
11-8
MOTOROLA
The QSPI contains an 80-byte block of dual-ported static RAM that can be accessed
by both the QSPI and the CPU16. The RAM is divided into three segments: receive
data RAM, transmit data RAM, and command data RAM. Receive data is information
received from a serial device external to the MCU. Transmit data is information stored
for transmission to an external device. Command control data defines transfer param-
eters. Refer to Figure 11-3, which shows RAM organization.
Data received by the QSPI is stored in this segment to be read by the CPU16. Data
stored in the receive RAM is right-justified. Unused bits in a receive queue entry are
set to zero by the QSPI upon completion of the individual queue entry. The CPU16 can
access the data using byte, word, or long-word transfers.
The CPTQP value in SPSR shows which queue entries have been executed. The
CPU16 can use this information to determine which locations in receive RAM contain
valid data before reading them.
Data that is to be transmitted by the QSPI is stored in this segment and must be written
by the CPU16 in right-justified form. The QSPI cannot modify information in the trans-
mit RAM. The QSPI copies the information to its data serializer for transmission. Infor-
mation remains in the transmit RAM until overwritten.
51E
500
RECEIVE
WORD
Freescale Semiconductor, Inc.
RAM
RRD
RRE
RRF
RR0
RR1
RR2
For More Information On This Product,
Figure 11-3 QSPI RAM
QUEUED SERIAL MODULE
Go to: www.freescale.com
53E
520
TRANSMIT
WORD
RAM
TRD
TRE
TRF
TR0
TR1
TR2
54F
540
COMMAND
BYTE
RAM
CRD
CRE
CR0
CR1
CR2
CRF
MC68HC16Y3/916Y3
USER’S MANUAL
QSPI RAM MAP