mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 191

no-image

mc68hc916y3

Manufacturer Part Number
mc68hc916y3
Description
Mc68hc16y3 16 Bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
7.5 Low-Power Stop Mode Operation
7.6 ROM Signature
7.7 Reset
MC68HC16Y3/916Y3
USER’S MANUAL
Refer to 5.6 Bus Operation for more information concerning access times.
Low-power stop mode minimizes MCU power consumption. Setting the STOP bit in
MRMCR places the MRM in low-power stop mode. In low-power stop mode, the array
cannot be accessed. The reset state of STOP is the complement of the logic state of
DATA14 during reset. Low-power stop mode is exited by clearing STOP.
Signature registers RSIGHI and RSIGLO contain a user-specified mask-programmed
signature pattern. A special signature algorithm allows the user to verify ROM array
content.
The state of the MRM following reset is determined by the default values programmed
into the MRMCR BOOT, LOCK, ASPC[1:0], and WAIT[1:0] bits. The default array
base address is determined by the values programmed into ROMBAL and ROMBAH.
When the mask programmed value of the MRMCR BOOT bit is zero, the contents of
MRM bootstrap words ROMBS[0:3] are used as reset vectors. When the mask pro-
grammed value of the MRMCR BOOT bit is one, reset vectors are fetched from exter-
nal memory, and system integration module chip-select logic is used to assert the boot
ROM select signal CSBOOT. Refer to 5.9.4 Chip-Select Reset Operation for more in-
formation concerning external boot ROM selection.
WAIT[1:0]
00
01
10
11
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 7-2 Wait States Field
Wait States
Go to: www.freescale.com
Number of
MASKED ROM MODULE
–1
0
1
2
Clocks per Transfer
3
4
5
2
MOTOROLA
7-3

Related parts for mc68hc916y3