mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 326

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mc68hc916y3

Manufacturer Part Number
mc68hc916y3
Description
Mc68hc16y3 16 Bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
14.6.2.3 Host Sequence Registers
14.6.2.4 Host Service Registers
14.6.2.5 Channel Priority Registers
14.6.3 Development Support and Test Registers
14-18
MOTOROLA
The host sequence field selects the mode of operation for the time function selected
on a given channel. The meaning of the host sequence bits depends on the time func-
tion specified. Refer to Table 14-5, which is a summary of the host sequence and host
service request bits for each time function. Refer to the TPU Reference Manual
(TPURM/AD) and the Motorola TPU Literature Package (TPULITPAK/D) for more
information.
The host service request field selects the type of host service request for the time func-
tion selected on a given channel. The meaning of the host service request bits is de-
termined by time function microcode. Refer to the TPU Reference Manual (TPURM/
AD) and the Motorola TPU Literature Package (TPULITPAK/D) for more information.
A host service request field of %00 signals the CPU that service is completed and that
there are no further pending host service requests. The host can request service on a
channel by writing the corresponding host service request field to one of three non-
zero states. It is imperative for the CPU to monitor the host service request register
and wait until the TPU2 clears the service request for a channel before changing any
parameters or issuing a new service request to the channel.
The channel priority registers (CPR1, CPR2) assign one of three priority levels to a
channel or disable the channel. Table 14-5 indicates the number of time slots guaran-
teed for each channel priority encoding.
These registers are used for custom microcode development or for factory test. De-
scribing the use of these registers is beyond the scope of this manual. Register de-
scriptions are provided in D.10 Time Processor Unit 2 (TPU2). Refer to the TPU
Reference Manual (TPURM/AD) for more information.
CHX[1:0]
00
01
10
11
Freescale Semiconductor, Inc.
Table 14-5 Channel Priority Encodings
For More Information On This Product,
TIME PROCESSOR UNIT 2
Go to: www.freescale.com
Disabled
Service
Middle
High
Low
Guaranteed Time Slots
1 out of 7
2 out of 7
4 out of 7
MC68HC16Y3/916Y3
USER’S MANUAL

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