mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 109

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mc68hc916y3

Manufacturer Part Number
mc68hc916y3
Description
Mc68hc16y3 16 Bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
5.1 General
MC68HC16Y3/916Y3
USER’S MANUAL
This section is an overview of the single-chip integration module 2 (SCIM2). Refer to
the SCIM Reference Manual (SCIMRM/AD) for a comprehensive discussion of SCIM2
capabilities. Refer to D.2 Single-Chip Integration Module 2 for information concerning
the SCIM2 address map and register structure.
The single-chip integration module 2 (SCIM2) consists of six submodules that, with a
minimum of external devices, control system startup, initialization, configuration, and
the external bus. Figure 5-1 shows a block diagram of the SCIM2.
The system configuration block controls MCU configuration and operating mode.
The system clock generates clock signals used by the SCIM2, other IMB modules, and
external devices. In addition, a periodic interrupt generator supports execution of time-
critical control routines.
The system protection block provides bus and software watchdog monitors.
The chip-select block provides five general-purpose chip-select signals and two emu-
lation-support chip-select signals. The general-purpose chip-select signals have asso-
ciated base address registers and option registers.
The external bus interface handles the transfer of information between IMB modules
and external address space.
The system test block incorporates hardware necessary for testing the MCU. It is used
to perform factory tests, and its use in normal applications is not supported.
The SCIM2 has three basic operating modes:
• 16-bit expanded mode, in which the SCIM2 provides a 24-bit external address
• 8-bit expanded mode, in which the SCIM2 provides a single general purpose I/O
bus and a 16-bit external data bus, eight general-purpose chip-select lines, a boot
ROM chip-select line, and seven interrupt request inputs. The bus control pins,
the chip-select pins, and the interrupt request pins can be configured as general
purpose I/O ports. In addition, two emulation chip-select lines are available —
CSE and CSM. The CSE line can be used to select an external port replacement
unit, and the CSM line can be used to select an external ROM-emulation device.
port, a 24-bit external address bus, an 8-bit external data bus, seven general pur-
pose chip-select lines, a boot ROM chip-select line, and seven interrupt request
lines. The bus control pins, the chip-select pins, and the interrupt request pins can
be configured as general purpose I/O ports.
SECTION 5 SINGLE-CHIP INTEGRATION MODULE 2
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
5-1

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